> For the complete documentation index, see [llms.txt](https://xiayingp.gitbook.io/build_a_os/llms.txt). Markdown versions of documentation pages are available by appending `.md` to page URLs; this page is available as [Markdown](https://xiayingp.gitbook.io/build_a_os/traps-and-interrupts/untitled-3.md).

# What is trampoline

### What is it?

Trampoline page stores code to switch between user and kernel space. The code is mapped at the same virtual address (TRAMPOLINE) in user and kernel space so that it continues to work when it switches page tables.

Note: the pointers, page table, sp, etc are stored in `trapframe`. 

{% content-ref url="/pages/-M4f4uBfm2Ua8uXLmsWU" %}
[What is trapframe](/build_a_os/traps-and-interrupts/untitled-2.md)
{% endcontent-ref %}

In trampoline, we just store plain assembly source code.

### Where does trampoline page store?

RISC-V hardware doesn’t switch page tables during a trap, we need the user page table to include a mapping for the trap vector instructions that **stvec** points to. Further, the trap vector must switch satp to point to the kernel page table. In order to avoid a crash, the vector instructions (stored in trampoline page) must be **mapped at the same address in the kernel page table as in the user page table.**

![](/files/-M4f9T6DU2BqnEh-Ax2I)

![](/files/-M4f9WL_V23wpMkkaW22)

In this way, after switching page table root in `satp` register, virtual memory is still the same, so it can continue to execute.

{% content-ref url="/pages/-M4f4tZ2YMuVakQBmWSJ" %}
[Trap Home Page](/build_a_os/traps-and-interrupts/trap-home-page.md)
{% endcontent-ref %}


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